The fabrication of such a layer increasingly involves techniques for transferring layers of various thicknesses from one carrier to another.
In many applications in the field of microelectronics, it may be desired to transfer what is called an “active layer,” for example, integrating electrical components, to a substrate, or a semiconductor layer present on the surface of a first substrate to a second substrate.
The active layer, as understood in the context of the present invention, cannot for reasons of its dimensions, especially its thickness, and its fragility, be considered to be self-supporting.
Thus, in order to transport the active layer, and in particular transfer it to a final substrate, it is necessary to securely fasten it to a transfer substrate referred to as a “handle substrate” or a “temporary substrate.” Such a temporary substrate then allows a layer that needs to be moved and/or transferred to be handled.
It may prove to be difficult to transfer the active layer to the final substrate using a temporary substrate because a first side of the active layer comprises electronic components, such as circuits and contact pads, commonly referred to as “bond pads,” forming a non-uniform three-dimensional surface topology specific to the first side of the active layer. This surface topology makes it difficult to securely fasten the temporary substrate to the first side of the active layer.
Prior-art solutions allowing the first side of an active layer, the surface topology of which is not planar, to be bonded to a temporary substrate consist in leveling and/or planarizing the side of the active layer, so as to obtain a regular surface topology suitable for bonding, for example, direct bonding. However, these methods are subject to drawbacks and difficulties with implementation.
One known solution, described in French Patent 2926671 A1, consists in forming a layer of adhesive material on the active layer, and especially on the side of the active layer having an irregular surface topology, so that the layer of adhesive material planarizes the surface topology of the active layer, with the objective of bonding the active layer to the final substrate by way of the layer of adhesive material. The drawback of this solution is that it is necessary to add a layer, increasing complexity of the process and increasing its production cost. Moreover, the layer of adhesive material makes contact with the electrical components forming the surface topology of the active layer. This contact may damage the elements.
Another solution, described in document JP11-297972, consists in covering the electrical components with a plurality of layers placed one on top of the other, the last of which is etched in order to obtain a desired level of planarity for a bonding step. Thus, this etching step may generate contamination and stress in the structure. Moreover, the electrical components also make direct contact with the first layer, possibly damaging them. Lastly, this solution requires as many deposition processes as there are deposited layers, making the process complex and expensive to implement.
The addition of layers, described in the aforementioned known prior-art solutions, moreover contributes to increasing the number of heat treatments required to stabilize and/or reinforce the bonding of these layers to a carrier. Thus, these solutions increase the thermal budget of production processes, possibly weakening or damaging certain electrical elements and increasing the cost of these production processes.
Moreover, and depending on the production processes of a desired structure, the addition of these layers complicates access, in subsequent fabrication steps, to the side of the active layer on which the added layers are placed.
The known prior-art solutions require various types of treatment on at least one side of the active layer in order to make it sufficiently planar for bonding. Depending on the type of treatment implemented, contaminants or applied strains contribute to decreasing the quality and operational performance of the active layer.